Convolutional Neural Networks using the nearbAI platform

Machine learning is everywhere these days, especially Artificial Intelligence (AI). Convolutional Neural Networks (CNNs) are one of the most prolific forms of AI on the current market. When trying to use CNNs for live image detection, companies currently have the choice between power-hogging GPUs and expensive dedicated ASICs. Quite a few of these companies would like to be able to choose the middle ground by having an FPGA implementation of their networks. That’s where a design house like Easics comes in.

Easics has developed a platform for automatic efficient implementations of Convolutional Neural Networks on FPGA and ASIC. Alongside this platform we have an API to allow clients to smoothly integrate their own networks into an embedded application. We want you to use this platform and API to build an embedded AI application. You'll start with a trained network, port it to the nearbAI platform and build a full application around this.

During this summer job, your task will be to write C++ for an embedded application. You'll weigh in on interfacing and usability features for our current implementation of both platform and API. At the end, you'll deliver a fully working stand-alone demo application.

Your profile:

  • Demonstrated programming experience in C++

  • Experience in clear reporting of findings

  • Basic experience with Git

  • Fluent in either Dutch or English

  • A background touching convolutional neural networks is a plus

Estimated time duration is 6 weeks in July/August/September, depending on your availability.

Send your resume, motivation letter and availability to summerjobs@easics.be

The deadline for applications is April 3rd 2020.

 

Prototyping a RISC-V processor system on FPGA

 

The revolution of the RISC-V processor is ongoing. Scaling from small controllers to multi-core Operating-System running beasts, RISC-V is all over the place. As an open instruction set, anybody can make a RISC-V processor, while being compatible with others, with standard compilers, Linux support and much more. No licenses, no royalties. Easics wants to participate in this community and join the movement.

Easics wants to build a prototype platform for RISC-V on FPGA. Therefore, we are looking for enthusiastic people to bring together knowledge of hardware and software design, to gather experience, and to produce a living system. In short, real hands-on experience!

During this period, your ability to read/write HDL code, and embedded software will be required, as well as architectural thinking and design choices. It's an opportunity to learn about the whole design process, from coding to actual testing and debugging on hardware.

Your profile:

  • A problem solver

  • Experience in HDL: VHDL/(System)Verilog

  • Fluent in either Dutch or English

  • Basic experience in C

  • Basic experience with Git

Estimated time duration is 6 weeks in July/August/September, depending on your availability.

Send your resume, motivation letter and availability to summerjobs@easics.be

The deadline for applications is April 3rd 2020.

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